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Not recommended for new designs - Please use 93LC76C or 93LC86C.
93LC76/86
8K/16K 2.5V Microwire Serial EEPROM
Features:
* Single supply with programming operation down to 2.5V * Low-power CMOS technology - 1 mA active current typical - 5 A standby current (typical) at 3.0V * ORG pin selectable memory configuration 1024 x 8 or 512 x 16 bit organization (93LC76) 2048 x 8 or 1024 x 16 bit organization (93LC86) * Self-timed erase and write cycles (including auto-erase) * Automatic ERAL before WRAL * Power on/off data protection circuitry * Industry standard 3-wire serial I/O * Device status signal during erase/write cycles * Sequential read function * 1,000,000 erase/write cycles ensured * Data retention > 200 years * 8-pin PDIP/SOIC package * Temperature ranges available - Commercial (C) 0C to +70C - Industrial (I) -40C to +85C
Package Types
PDIP Package
CS CLK DI DO
1 2 3 4
8 7 6 5
VCC PE ORG VSS
93LC76/86
SOIC Package 1 2 3 4 8 7 6 5
93LC76/86
CS CLK DI DO
VCC PE ORG VSS
Block Diagram
VCC VSS
Description:
The Microchip Technology Inc. 93LC76/86 are 8K and 16K low voltage serial Electrically Erasable PROMs. The device memory is configured as x8 or x16 bits depending on the ORG pin setup. Advanced CMOS technology makes these devices ideal for low power nonvolatile memory applications. These devices also have a Program Enable (PE) pin to allow the user to write-protect the entire contents of the memory array. The 93LC76/86 is available in standard 8-pin PDIP and 8-pin surface mount SOIC packages.
DI
Memory Array
Address Decoder
Address Counter
Data Register
Output Buffer
DO
PE CS
Mode Decode Logic
CLK
Clock Generator
2004 Microchip Technology Inc.
Preliminary
DS21131E-page 1
93LC76/86
1.0 ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings()
VCC.............................................................................................................................................................................7.0V All inputs and outputs w.r.t. VSS ........................................................................................................ -0.6V to Vcc + 1.0V Storage temperature ...............................................................................................................................-65C to +150C Ambient temperature with power applied ................................................................................................-40C to +125C Soldering temperature of leads (10 seconds) .......................................................................................................+300C ESD protection on all pins ..........................................................................................................................................4 kV NOTICE: Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational listings of this specification is not implied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability.
1.1
AC Test Conditions
VLO = 2.0V VHI = Vcc - 0.2V VHI = 4.0V for (Note 1) (Note 2)
AC Waveform:
Timing Measurement Reference Level Input Output 0.5 VCC 0.5 VCC
Note 1: For VCC 4.0V 2: For VCC > 4.0V
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TABLE 1-1: DC CHARACTERISTICS
Applicable over recommended operating ranges shown below unless otherwise noted: VCC = +2.5V to +6.0V Commercial (C): TA = 0C to +70C Industrial (I): TA = -40C to +85C Symbol VIH1 VIH2 VIL1 VIL2 VOL1 VOL2 VOH1 VOH2 ILI ILO CINT ICC write ICC read ICCS Min. 2.0 0.7 VCC -0.3 -0.3 -- -- 2.4 VCC-0.2 -10 -10 -- -- -- -- Max. VCC + 1 VCC + 1 0.8 0.2 VCC 0.4 0.2 -- -- 10 10 7 3 1 500 100 30 Units V V V V V V V V A A pF mA mA A A A Conditions VCC 2.7V VCC < 2.7V VCC 2.7V VCC < 2.7V IOL = 2.1 mA; VCC = 4.5V IOL =100 A; VCC = VCC Min. IOH = -400 A; VCC = 4.5V IOH = -100 A; VCC = VCC Min. VIN = 0.1V to VCC VOUT = 0.1V to VCC (Note 1) TA = +25C, FCLK = 1 MHz VCC = 5.5V FCLK = 3 MHz; VCC = 5.5V FCLK = 1 MHz; VCC = 3.0V CLK = CS = 0V; VCC = 5.5V CLK = CS = 0V; VCC = 3.0V DI = PE = VSS ORG = VSS or VCC
DC CHARACTERISTICS
Parameter High-level input voltage Low-level input voltage Low-level output voltage High-level output voltage Input leakage current Output leakage current Pin capacitance (all inputs/outputs) Operating current
Standby current
Note 1:
This parameter is periodically sampled and not 100% tested.
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TABLE 1-2: AC CHARACTERISTICS
Applicable over recommended operating ranges shown below unless otherwise noted: VCC = +2.5V to +6.0V Commercial (C): TA = 0C to +70C Industrial (I): TA = -40C to +85C Symbol FCLK TCKH TCKL TCSS TCSH TCSL TDIS TDIH TPD TCZ Tsv TWC TEC TWL -- Min. -- 200 300 100 200 50 100 0 250 50 100 50 100 -- -- -- -- -- -- 1M Max. 3 2 -- -- -- -- -- -- -- 100 250 100 500 200 300 5 15 30 -- Units MHz MHz ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ms ms ms cycles Conditions 4.5V VCC 6.0V 2.5V VCC < 4.5V 4.5V VCC 6.0V 2.5V VCC < 4.5V 4.5V VCC 6.0V 2.5V VCC < 4.5V 4.5V VCC 6.0V, Relative to CLK 2.5V VCC < 4.5V, Relative to CLK -- Relative to CLK 4.5V VCC 6.0V, Relative to CLK 2.5V VCC <4.5V, Relative to CLK 4.5V VCC 6.0V, Relative to CLK 2.5V VCC < 4.5V, Relative to CLK 4.5V VCC 6.0V, CL = 100 pF 2.5V VCC < 4.5V, CL = 100 pF 4.5V VCC 6.0V 2.5V VCC < 4.5V (Note 1) 4.5V VCC 6.0V, CL = 100 pF 2.5V VCC <4.5V, CL = 100 pF Erase/Write mode ERAL mode WRAL mode 25C, Vcc = 5.0V, Block mode (Note 2)
AC CHARACTERISTICS
Parameter Clock frequency Clock high time Clock low time Chip select setup time Chip select hold time Chip select low time Data input setup time Data input hold time Data output delay time Data output disable time Status valid time Program cycle time
Endurance Note 1: 2:
This parameter is periodically sampled and not 100% tested. This parameter is not tested but ensured by characterization. For endurance estimates in a specific application, please consult the Total EnduranceTM Model which can be obtained from Microchip's web site at www.microchip.com.
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93LC76/86
TABLE 1-3:
Instruction READ EWEN ERASE ERAL WRITE WRAL EWDS
INSTRUCTION SET FOR 93LC76: ORG=1 (1X16 ORGANIZATION)
SB 1 1 1 1 1 1 1 Opcode 10 00 11 00 01 00 00 Address X A8 A7 A6 A5 A4 A3 11XXXXX X A8 A7 A6 A5 A4 A3 10XXXXX X A8 A7 A6 A5 A4 A3 01XXXXX 00XXXXX A2 X A2 X A2 X X A1 X A1 X A1 X X Data In A0 -- X -- A0 -- X -- A0 D15 - D0 X D15 - D0 X -- Data Out D15 - D0 High-Z (RDY/BSY) (RDY/BSY) (RDY/BSY) (RDY/BSY) High-Z Req. CLK Cycles 29 13 13 13 29 29 13
TABLE 1-4:
Instruction READ EWEN ERASE ERAL WRITE WRAL EWDS
INSTRUCTION SET FOR 93LC76: ORG=0 (X8 ORGANIZATION)
SB 1 1 1 1 1 1 1 Opcode 10 00 11 00 01 00 00 Address X A9 A8 A7 A6 A5 A4 11XXXXX X A9 A8 A7 A6 A5 A4 10XXXXX X A9 A8 A7 A6 A5 A4 01XXXXX 00XXXXX A3 X A3 X A3 X X A2 X A2 X A2 X X A1 A0 X A1 A0 X A1 A0 X X Data In -- -- -- -- D7 - D0 D7 - D0 -- Data Out D7 - D0 High-Z (RDY/BSY) (RDY/BSY) (RDY/BSY) (RDY/BSY) High-Z Req. CLK Cycles 22 14 14 14 22 22 14
TABLE 1-5:
Instruction READ EWEN ERASE ERAL WRITE WRAL EWDS
INSTRUCTION SET FOR 93LC86: ORG=1 (X16 ORGANIZATION)
SB 1 1 1 1 1 1 1 Opcode 10 00 11 00 01 00 00 Address A9 A8 A7 A6 A5 A4 A3 11XXXXX A9 A8 A7 A6 A5 A4 A3 10XXXXX A9 A8 A7 A6 A5 A4 A3 01XXXXX 00XXXXX A2 X A2 X A2 X X A1 X A1 X A1 X X Data In A0 -- X -- A0 -- X -- A0 D15 - D0 X D15 - D0 X -- Data Out D15 - D0 High-Z (RDY/BSY) (RDY/BSY) (RDY/BSY) (RDY/BSY) High-Z Req. CLK Cycles 29 13 13 13 29 29 13
TABLE 1-6:
Instruction READ EWEN ERASE ERAL WRITE WRAL EWDS
INSTRUCTION SET FOR 93LC86: ORG=0 (X8 ORGANIZATION)
SB 1 1 1 1 1 1 1 Opcode 10 00 11 00 01 00 00 Address A10 A9 A8 A7 A6 A5 A4 1 1XXXXX A10 A9 A8 A7 A6 A5 A4 1 0XXXXX A10 A9 A8 A7 A6 A5 A4 0 1XXXXX 0 0XXXXX A3 X A3 X A3 X X A2 X A2 X A2 X X A1 A0 X A1 A0 X A1 A0 X X Data In -- -- -- -- D7 - D0 D7 - D0 -- Data Out D7 - D0 High-Z (RDY/BSY) (RDY/BSY) (RDY/BSY) (RDY/BSY) High-Z Req. CLK Cycles 22 14 14 14 22 22 14
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2.0 PRINCIPLES OF OPERATION
2.3
When the ORG pin is connected to VCC, the x16 organization is selected. When it is connected to ground, the x8 organization is selected. Instructions, addresses and write data are clocked into the DI pin on the rising edge of the clock (CLK). The DO pin is normally held in a high-Z state except when reading data from the device, or when checking the Ready/Busy status during a programming operation. The Ready/Busy status can be verified during an erase/write operation by polling the DO pin; DO low indicates that programming is still in progress, while DO high indicates the device is ready. The DO will enter the high-impedance state on the falling edge of the CS.
Erase/Write Enable and Disable (EWEN, EWDS)
The 93LC76/86 powers up in the Erase/Write Disable (EWDS) state. All programming modes must be preceded by an Erase/Write Enable (EWEN) instruction. Once the EWEN instruction is executed, programming remains enabled until an EWDS instruction is executed or VCC is removed from the device. To protect against accidental data disturb, the EWDS instruction can be used to disable all erase/write functions and should follow all programming operations. Execution of a READ instruction is independent of both the EWEN and EWDS instructions.
2.1
Start Condition
2.4
Data Protection
The Start bit is detected by the device if CS and DI are both high with respect to the positive edge of CLK for the first time. Before a Start condition is detected, CS, CLK and DI may change in any combination (except to that of a Start condition), without resulting in any device operation (Read, Write, Erase, EWEN, EWDS, ERAL and WRAL). As soon as CS is high, the device is no longer in the Standby mode. An instruction following a Start condition will only be executed if the required amount of opcode, address and data bits for any particular instruction are clocked in. After execution of an instruction (i.e., clock in or out of the last required address or data bit) CLK and DI become "don't care" bits until a new Start condition is detected.
During power-up, all programming modes of operation are inhibited until VCC has reached a level greater than 1.4V. During power-down, the source data protection circuitry acts to inhibit all programming modes when VCC has fallen below 1.4V. The EWEN and EWDS commands give additional protection against accidentally programming during normal operation. After power-up, the device is automatically in the EWDS mode. Therefore, an EWEN instruction must be performed before any ERASE or WRITE instruction can be executed.
2.2
DI/DO
It is possible to connect the Data In and Data Out pins together. However, with this configuration it is possible for a "bus conflict" to occur during the "dummy zero" that precedes the read operation, if A0 is a logic high level. Under such a condition the voltage level seen at Data Out is undefined and will depend upon the relative impedances of Data Out and the signal source driving A0. The higher the current sourcing capability of A0, the higher the voltage at the Data Out pin.
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93LC76/86
3.0
3.1
DEVICE OPERATION
READ
3.4
Erase All (ERAL)
The READ instruction outputs the serial data of the addressed memory location on the DO pin. A dummy zero bit precedes the 16-bit (x16 organization) or 8-bit (x8 organization) output string. The output data bits will toggle on the rising edge of the CLK and are stable after the specified time delay (TPD). Sequential read is possible when CS is held high and clock transitions continue. The memory address pointer will automatically increment and output data sequentially.
The ERAL instruction will erase the entire memory array to the logical "1" state. The ERAL cycle is identical to the erase cycle except for the different opcode. The ERAL cycle is completely self-timed and commences on the rising edge of the last address bit (A0). Note that the Least Significant 8 or 9 address bits are "don't care" bits, depending on selection of x16 or x8 mode. Clocking of the CLK pin is not necessary after the device has entered the self clocking mode. The ERAL instruction is ensured at VCC = +4.5V to +6.0V. The DO pin indicates the Ready/Busy status of the device if the CS is high. The Ready/Busy status will be displayed on the DO pin until the next Start bit is received as long as CS is high. Bringing the CS low will place the device in Standby mode and cause the DO pin to enter the high-impedance state. DO at logical "0" indicates that programming is still in progress. DO at logical "1" indicates that the entire device has been erased and is ready for another instruction. The ERAL cycle takes 15 ms maximum (8 ms typical).
3.2
ERASE
The ERASE instruction forces all data bits of the specified address to the logical "1" state. The self-timed programming cycle is initiated on the rising edge of CLK as the last address bit (A0) is clocked in. At this point, the CLK, CS and DI inputs become "don't cares". The DO pin indicates the Ready/Busy status of the device if the CS is high. The Ready/Busy status will be displayed on the DO pin until the next Start bit is received as long as CS is high. Bringing the CS low will place the device in Standby mode and cause the DO pin to enter the high-impedance state. DO at logical "0" indicates that programming is still in progress. DO at logical "1" indicates that the register at the specified address has been erased and the device is ready for another instruction. The erase cycle takes 3 ms per word (typical).
3.5
Write All (WRAL)
3.3
WRITE
The WRITE instruction is followed by 16 bits (or by 8 bits) of data to be written into the specified address. The self-timed programming cycle is initiated on the rising edge of CLK as the last data bit (D0) is clocked in. At this point, the CLK, CS and DI inputs become "don't cares". The DO pin indicates the Ready/Busy status of the device if the CS is high. The Ready/Busy status will be displayed on the DO pin until the next Start bit is received as long as CS is high. Bringing the CS low will place the device in Standby mode and cause the DO pin to enter the high-impedance state. DO at logical "0" indicates that programming is still in progress. DO at logical "1" indicates that the register at the specified address has been written and the device is ready for another instruction. The write cycle takes 3 ms per word (typical).
The WRAL instruction will write the entire memory array with the data specified in the command. The WRAL cycle is completely self-timed and commences on the rising edge of the last address bit (A0). Note that the Least Significant 8 or 9 address bits are "don't cares", depending on selection of x16 or x8 mode. Clocking of the CLK pin is not necessary after the device has entered the self clocking mode. The WRAL command does include an automatic ERAL cycle for the device. Therefore, the WRAL instruction does not require an ERAL instruction but the chip must be in the EWEN status. The WRAL instruction is ensured at Vcc = +4.5V to +6.0V. The DO pin indicates the Ready/Busy status of the device if the CS is high. The Ready/Busy status will be displayed on the DO pin until the next Start bit is received as long as CS is high. Bringing the CS low will place the device in Standby mode and cause the DO pin to enter the high-impedance state. DO at logical "0" indicates that programming is still in progress. DO at logical "1" indicates that the entire device has been written and is ready for another instruction. The WRAL cycle takes 30 ms maximum (16 ms typical).
2004 Microchip Technology Inc.
Preliminary
DS21131E-page 7
93LC76/86
FIGURE 3-1:
CS VIH VIL CLK VIH VIL DI VIH VIL DO (Read) VOH VOL TSV Status Valid TPD TPD TCZ TCZ TDIS TDIH TCSS TCKH TCKL TCSH
SYNCHRONOUS DATA TIMING
VOH DO (Program) VOL
The memory automatically cycles to the next register. FIGURE 3-2:
CS
READ
TCSL
CLK
DI
1
1
0
AN
...
A0
DO
High-impedance
0
DN
...
D0
DN
...
D0
FIGURE 3-3:
CS
EWEN
TCSL
CLK ...
DI
1
0
0
1
1
X
X
ORG = VCC, 8 X's ORG = VSS, 9 X's
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93LC76/86
FIGURE 3-4:
CS
EWDS
TCSL
CLK
DI
1
0
0
0
0
X
...
X
ORG = VCC, 8 X's ORG = VSS, 9 X'S
FIGURE 3-5:
CS
WRITE
Standby
CLK ... ...
DI
1
0
1
AN
A0
DN
D0 TCZ BUSY TWC Ready
DO
High-impedance
FIGURE 3-6:
CS
WRAL
Standby
CLK ... DN ...
DI
1
0
0
0
1
X
X
D0 TCZ BUSY
DO ORG = VCC, 8 X's ORG = VSS, 9 X's
High-impedance
Ready
TWL Ensured at Vcc = +4.5V to +6.0V.
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93LC76/86
FIGURE 3-7:
CS
ERASE
Standby
CLK
DI
1
1
1
AN
...
...
A0 TCZ
DO
High-impedance
BUSY TWC
Ready
FIGURE 3-8:
CS
ERAL
Standby
CLK ...
DI
1
0
0
1
0
X
X TCZ BUSY TEC Ready
High-impedance DO ORG=VCC, 8 X's ORG=VSS, 9 X's
Ensured at VCC = +4.5V to +6.0V.
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4.0 PIN DESCRIPTIONS
PIN FUNCTION TABLE
Function Chip Select Serial Data Clock Serial Data Input Serial Data Output Ground Memory Configuration Program Enable Power Supply
TABLE 4-1:
Name CS CLK DI DO VSS ORG PE VCC
After detection of a Start condition the specified number of clock cycles (respectively low-to-high transitions of CLK) must be provided. These clock cycles are required to clock in all opcode, address, and data bits before an instruction is executed (see Table 1-3 through Table 1-6 for more details). CLK and DI then become don't care inputs waiting for a new Start condition to be detected. Note: CS must go low between consecutive instructions, except when performing a sequential read (Refer to Section 3.1 "READ" for more detail on sequential reads).
4.3
Data In (DI)
Data In is used to clock in a Start bit, opcode, address and data synchronously with the CLK input.
4.1
Chip Select (CS)
4.4
Data Out (DO)
A high level selects the device. A low level deselects the device and forces it into Standby mode. However, a programming cycle which is already initiated will be completed, regardless of the CS input signal. If CS is brought low during a program cycle, the device will go into Standby mode as soon as the programming cycle is completed. CS must be low for 250 ns minimum (TCSL) between consecutive instructions. If CS is low, the internal control logic is held in a Reset status.
Data Out is used in the Read mode to output data synchronously with the CLK input (TPD after the positive edge of CLK). This pin also provides Ready/Busy status information during erase and write cycles. Ready/Busy status information is available when CS is high. It will be displayed until the next Start bit occurs as long as CS stays high.
4.5
Organization (ORG)
4.2
Serial Clock (CLK)
The Serial Clock is used to synchronize the communication between a master device and the 93LC76/86. Opcode, address and data bits are clocked in on the positive edge of CLK. Data bits are also clocked out on the positive edge of CLK. CLK can be stopped anywhere in the transmission sequence (at high or low level) and can be continued anytime with respect to clock high time (TCKH) and clock low time (TCKL). This gives the controlling master freedom in preparing opcode, address and data. CLK is a "don't care" if CS is low (device deselected). If CS is high, but Start condition has not been detected, any number of clock cycles can be received by the device without changing its status (i.e., waiting for Start condition). CLK cycles are not required during the self-timed WRITE (i.e., auto erase/write) cycle.
When ORG is connected to VCC, the x16 memory organization is selected. When ORG is tied to VSS, the x8 memory organization is selected. There is an internal pull-up resistor on the ORG pin that will select x16 organization when left unconnected.
4.6
Program Enable (PE)
This pin allows the user to enable or disable the ability to write data to the memory array. If the PE pin is floated or tied to VCC, the device can be programmed. If the PE pin is tied to VSS, programming will be inhibited. There is an internal pull-up on this device that enables programming if this pin is left floating.
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Preliminary
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93LC76/86
5.0
5.1
PACKAGING INFORMATION
Package Marking Information
8-Lead PDIP XXXXXXXX XXXXXNNN YYWW
Example 93LC76 017 0410
8-Lead SOIC (.150") XXXXXXXX XXXXYYWW NNN
Example 93LC86 /SN0410 017
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93LC76/86
8-Lead Plastic Dual In-line (P) - 300 mil Body (PDIP)
E1
D 2 n 1 E
A
A2
c
L A1
eB
B1 p B
Number of Pins Pitch Top to Seating Plane Molded Package Thickness Base to Seating Plane Shoulder to Shoulder Width Molded Package Width Overall Length Tip to Seating Plane Lead Thickness Upper Lead Width Lower Lead Width Overall Row Spacing Mold Draft Angle Top Mold Draft Angle Bottom * Controlling Parameter Significant Characteristic
Units Dimension Limits n p A A2 A1 E E1 D L c B1 B eB
MIN
.140 .115 .015 .300 .240 .360 .125 .008 .045 .014 .310 5 5
INCHES* NOM 8 .100 .155 .130 .313 .250 .373 .130 .012 .058 .018 .370 10 10
MAX
MIN
.170 .145 .325 .260 .385 .135 .015 .070 .022 .430 15 15
MILLIMETERS NOM 8 2.54 3.56 3.94 2.92 3.30 0.38 7.62 7.94 6.10 6.35 9.14 9.46 3.18 3.30 0.20 0.29 1.14 1.46 0.36 0.46 7.87 9.40 5 10 5 10
MAX
4.32 3.68 8.26 6.60 9.78 3.43 0.38 1.78 0.56 10.92 15 15
Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010" (0.254mm) per side. JEDEC Equivalent: MS-001 Drawing No. C04-018
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93LC76/86
8-Lead Plastic Small Outline (SN) - Narrow, 150 mil Body (SOIC)
E E1
p
D 2 B n 1
h 45
c A A2
L A1
Number of Pins Pitch Overall Height Molded Package Thickness Standoff Overall Width Molded Package Width Overall Length Chamfer Distance Foot Length Foot Angle Lead Thickness Lead Width Mold Draft Angle Top Mold Draft Angle Bottom * Controlling Parameter Significant Characteristic
Units Dimension Limits n p A A2 A1 E E1 D h L c B
MIN
.053 .052 .004 .228 .146 .189 .010 .019 0 .008 .013 0 0
INCHES* NOM 8 .050 .061 .056 .007 .237 .154 .193 .015 .025 4 .009 .017 12 12
MAX
MIN
.069 .061 .010 .244 .157 .197 .020 .030 8 .010 .020 15 15
MILLIMETERS NOM 8 1.27 1.35 1.55 1.32 1.42 0.10 0.18 5.79 6.02 3.71 3.91 4.80 4.90 0.25 0.38 0.48 0.62 0 4 0.20 0.23 0.33 0.42 0 12 0 12
MAX
1.75 1.55 0.25 6.20 3.99 5.00 0.51 0.76 8 0.25 0.51 15 15
Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010" (0.254mm) per side. JEDEC Equivalent: MS-012 Drawing No. C04-057
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APPENDIX A:
Revision E Added note to page 1 header (Not recommended for new designs). Added Section 5.0: Package Marking Information. Added On-line Support page. Updated document format.
REVISION HISTORY
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NOTES:
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ON-LINE SUPPORT
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2004 Microchip Technology Inc.
Preliminary
DS21131E-page 17
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READER RESPONSE
It is our intention to provide you with the best documentation possible to ensure successful use of your Microchip product. If you wish to provide your comments on organization, clarity, subject matter, and ways in which our documentation can better serve you, please FAX your comments to the Technical Publications Manager at (480) 792-4150. Please list the following information, and use this outline to provide us with your comments about this document. To: RE: Technical Publications Manager Reader Response Total Pages Sent ________
From: Name Company Address City / State / ZIP / Country Telephone: (_______) _________ - _________ Application (optional): Would you like a reply? Device: 93LC76/86 Questions: 1. What are the best features of this document? Y N Literature Number: DS21131E FAX: (______) _________ - _________
2. How does this document meet your hardware and software development needs?
3. Do you find the organization of this document easy to follow? If not, why?
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5. What deletions from the document could be made without affecting the overall usefulness?
6. Is there any incorrect or misleading information (what and where)?
7. How would you improve this document?
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93LC76/86
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. PART NO. Device X Temperature Range /XX Package XXX Pattern
Device
93LC76/86: Microwire Serial EEPROM 93LC76T/86T: Microwire Serial EEPROM (Tape and Reel)
Temperature Range
Blank I
= 0C to = -40C to
+70C +85C
Package
P SN
= =
Plastic DIP (300 mil Body), 8-lead Plastic SOIC (150 mil Body), 8-lead
Sales and Support
Data Sheets Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences and recommended workarounds. To determine if an errata sheet exists for a particular device, please contact one of the following: 1. 2. 3. Your local Microchip sales office The Microchip Corporate Literature Center U.S. FAX: (480) 792-7277 The Microchip Worldwide Site (www.microchip.com)
Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using. New Customer Notification System Register on our web site (www.microchip.com/cn) to receive the most current information on our products.
2004 Microchip Technology Inc.
Preliminary
DS21131E-page 19
93LC76/86
NOTES:
DS21131E-page 20
Preliminary
2004 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices: * * Microchip products meet the specification contained in their particular Microchip Data Sheet. Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip's Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. Microchip is willing to work with the customer who is concerned about the integrity of their code. Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as "unbreakable."
*
* *
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip's code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device applications and the like is intended through suggestion only and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. No representation or warranty is given and no liability is assumed by Microchip Technology Incorporated with respect to the accuracy or use of such information, or infringement of patents or other intellectual property rights arising from such use or otherwise. Use of Microchip's products as critical components in life support systems is not authorized except with express written approval by Microchip. No licenses are conveyed, implicitly or otherwise, under any intellectual property rights.
Trademarks The Microchip name and logo, the Microchip logo, Accuron, dsPIC, KEELOQ, microID, MPLAB, PIC, PICmicro, PICSTART, PRO MATE, PowerSmart, rfPIC, and SmartShunt are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. AmpLab, FilterLab, MXDEV, MXLAB, PICMASTER, SEEVAL, SmartSensor and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Incorporated in the U.S.A. Analog-for-the-Digital Age, Application Maestro, dsPICDEM, dsPICDEM.net, dsPICworks, ECAN, ECONOMONITOR, FanSense, FlexROM, fuzzyLAB, In-Circuit Serial Programming, ICSP, ICEPIC, Migratable Memory, MPASM, MPLIB, MPLINK, MPSIM, PICkit, PICDEM, PICDEM.net, PICLAB, PICtail, PowerCal, PowerInfo, PowerMate, PowerTool, rfLAB, rfPICDEM, Select Mode, Smart Serial, SmartTel and Total Endurance are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. (c) 2004, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper.
Microchip received ISO/TS-16949:2002 quality system certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona and Mountain View, California in October 2003. The Company's quality system processes and procedures are for its PICmicro(R) 8-bit MCUs, KEELOQ(R) code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip's quality system for the design and manufacture of development systems is ISO 9001:2000 certified.
2004 Microchip Technology Inc.
Preliminary
DS21131E-page 21
WORLDWIDE SALES AND SERVICE
AMERICAS
Corporate Office
2355 West Chandler Blvd. Chandler, AZ 85224-6199 Tel: 480-792-7200 Fax: 480-792-7277 Technical Support: 480-792-7627 Web Address: www.microchip.com
China - Beijing
Unit 706B Wan Tai Bei Hai Bldg. No. 6 Chaoyangmen Bei Str. Beijing, 100027, China Tel: 86-10-85282100 Fax: 86-10-85282104
Korea
168-1, Youngbo Bldg. 3 Floor Samsung-Dong, Kangnam-Ku Seoul, Korea 135-882 Tel: 82-2-554-7200 Fax: 82-2-558-5932 or 82-2-558-5934
Singapore
200 Middle Road #07-02 Prime Centre Singapore, 188980 Tel: 65-6334-8870 Fax: 65-6334-8850
China - Chengdu
Rm. 2401-2402, 24th Floor, Ming Xing Financial Tower No. 88 TIDU Street Chengdu 610016, China Tel: 86-28-86766200 Fax: 86-28-86766599
Atlanta
3780 Mansell Road, Suite 130 Alpharetta, GA 30022 Tel: 770-640-0034 Fax: 770-640-0307
Taiwan
Kaohsiung Branch 30F - 1 No. 8 Min Chuan 2nd Road Kaohsiung 806, Taiwan Tel: 886-7-536-4818 Fax: 886-7-536-4803
Boston
2 Lan Drive, Suite 120 Westford, MA 01886 Tel: 978-692-3848 Fax: 978-692-3821
China - Fuzhou
Unit 28F, World Trade Plaza No. 71 Wusi Road Fuzhou 350001, China Tel: 86-591-7503506 Fax: 86-591-7503521
Taiwan
Taiwan Branch 11F-3, No. 207 Tung Hua North Road Taipei, 105, Taiwan Tel: 886-2-2717-7175 Fax: 886-2-2545-0139
Chicago
333 Pierce Road, Suite 180 Itasca, IL 60143 Tel: 630-285-0071 Fax: 630-285-0075
China - Hong Kong SAR
Unit 901-6, Tower 2, Metroplaza 223 Hing Fong Road Kwai Fong, N.T., Hong Kong Tel: 852-2401-1200 Fax: 852-2401-3431
Dallas
4570 Westgrove Drive, Suite 160 Addison, TX 75001 Tel: 972-818-7423 Fax: 972-818-2924
EUROPE
Austria
Durisolstrasse 2 A-4600 Wels Austria Tel: 43-7242-2244-399 Fax: 43-7242-2244-393
China - Shanghai
Room 701, Bldg. B Far East International Plaza No. 317 Xian Xia Road Shanghai, 200051 Tel: 86-21-6275-5700 Fax: 86-21-6275-5060
Detroit
Tri-Atria Office Building 32255 Northwestern Highway, Suite 190 Farmington Hills, MI 48334 Tel: 248-538-2250 Fax: 248-538-2260
Denmark
Regus Business Centre Lautrup hoj 1-3 Ballerup DK-2750 Denmark Tel: 45-4420-9895 Fax: 45-4420-9910
China - Shenzhen
Rm. 1812, 18/F, Building A, United Plaza No. 5022 Binhe Road, Futian District Shenzhen 518033, China Tel: 86-755-82901380 Fax: 86-755-8295-1393
Kokomo
2767 S. Albright Road Kokomo, IN 46902 Tel: 765-864-8360 Fax: 765-864-8387
France
Parc d'Activite du Moulin de Massy 43 Rue du Saule Trapu Batiment A - ler Etage 91300 Massy, France Tel: 33-1-69-53-63-20 Fax: 33-1-69-30-90-79
China - Shunde
Room 401, Hongjian Building, No. 2 Fengxiangnan Road, Ronggui Town, Shunde District, Foshan City, Guangdong 528303, China Tel: 86-757-28395507 Fax: 86-757-28395571
Los Angeles
18201 Von Karman, Suite 1090 Irvine, CA 92612 Tel: 949-263-1888 Fax: 949-263-1338
China - Qingdao
Rm. B505A, Fullhope Plaza, No. 12 Hong Kong Central Rd. Qingdao 266071, China Tel: 86-532-5027355 Fax: 86-532-5027205
Germany
Steinheilstrasse 10 D-85737 Ismaning, Germany Tel: 49-89-627-144-0 Fax: 49-89-627-144-44
San Jose
1300 Terra Bella Avenue Mountain View, CA 94043 Tel: 650-215-1444 Fax: 650-961-0286
India
Divyasree Chambers 1 Floor, Wing A (A3/A4) No. 11, O'Shaugnessey Road Bangalore, 560 025, India Tel: 91-80-22290061 Fax: 91-80-22290062
Italy
Via Quasimodo, 12 20025 Legnano (MI) Milan, Italy Tel: 39-0331-742611 Fax: 39-0331-466781
Toronto
6285 Northam Drive, Suite 108 Mississauga, Ontario L4V 1X5, Canada Tel: 905-673-0699 Fax: 905-673-6509
Japan
Benex S-1 6F 3-18-20, Shinyokohama Kohoku-Ku, Yokohama-shi Kanagawa, 222-0033, Japan Tel: 81-45-471- 6166 Fax: 81-45-471-6122
Netherlands
Waegenburghtplein 4 NL-5152 JR, Drunen, Netherlands Tel: 31-416-690399 Fax: 31-416-690340
ASIA/PACIFIC
Australia
Suite 22, 41 Rawson Street Epping 2121, NSW Australia Tel: 61-2-9868-6733 Fax: 61-2-9868-6755
United Kingdom
505 Eskdale Road Winnersh Triangle Wokingham Berkshire, England RG41 5TU Tel: 44-118-921-5869 Fax: 44-118-921-5820
05/28/04
DS21131E-page 22
Preliminary
2004 Microchip Technology Inc.

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